S15: Protocol Interface: I2C - CAN Bridge
- 1 Serial Protocol Convertor
- 2 Abstract
- 3 Objectives & Introduction
- 4 Team Members & Responsibilities
- 5 Schedule
- 6 Parts List & Cost
- 7 Hardware Design
- 8 Hardware Interface
- 9 Software Design
- 10 Implementation
- 11 Testing & Technical Challenges
- 12 Conclusion
- 13 Datasheet
- 14 Project Video
- 15 Project Source Code
- 16 References
Serial Protocol Convertor
This project is aimed at developing a device that can act as an interface between I2C bus and CAN bus. This device "Protocol Interface: I2C - CAN Birdge" can receive the data over CAN bus and can give it to a device connected on an I2C bus. The data is stored using a mailbox concept meaning message with different CAN ID is stored in different mailboxes. The mailboxes can be configured for a specific CAN ID, CAN ID with Mask Bits and different sizes.
Objectives & Introduction
In industry generally a system requires micro-controllers with multiple inbuilt CAN peripherals. But not all micro-controllers come with multiple inbuilt CAN peripheral. Considering the economical factors of the system such micro-controllers increases the overall cost. The PI2C244 provides a solution to this problem.
Team Members & Responsibilities
|S.R.||Team Member's Name||Tasks|
|3|| Rutwik Kulkarni
|4|| Mitesh Sanghvi|
|S.R.||Start Date||End Date||Task||Status|| Actual Completion|
|1||03/08/2015||03/14/2015||Develop driver for interrupt based I2C acting as a Slave Device||Completed||03/14/2015|
|2||03/15/2015||03/21/2015||Exploring CAN API and building CAN bus for communication||Completed||03/21/2015|
|3||03/22/2015||03/28/2015||Study and Design mailbox system for CAN messages||Completed||03/28/2015|
|4||03/29/2015||04/04/2015||Develop program for configuring the Protocol Interface by I2C Master||Completed||04/04/2015|
|5||04/05/2015||04/11/2015||Create task for storing CAN messages in mailboxes||Completed||04/11/2015|
|6||04/12/2015||04/18/2015||Create task for giving interrupt to I2C Master||Completed||04/18/2015|
|7||04/19/2015||04/25/2015||Create task for sending message on CAN received from I2C Master||Completed||04/25/2015|
|8||04/26/2015||05/02/2015||Design of Status Register for Protocol Interface||Completed||05/02/2015|
|9||05/03/2015||05/09/2015||Finalizing appropriate addresses for all registers||Completed||05/09/2015|
|10||05/10/2015||05/16/2015||Testing of Protocol Interface for various conditions||Completed||05/12/2015|
|11||05/17/2015||05/23/2015||Adding a feature of Bit-Masked CAN IDs||Completed||05/22/2015|
Parts List & Cost
|2||Ultrasonic Sensor (Optional)||Parallax||28015||1||$23.00|
|3||CAN Transceiver (Free Samples)||Microchip||MCP2551||1||$0.00|
|4||Linear Voltage Regulator (Free Sample)||LT||LT1083-5||1||$0.00|
This project is used as an interface for an I2C controller to communicate over the CAN bus. The I2C controller should act as an I2C master and the Protocol Interface device will act as an I2C slave device. Since the communication from the I2C slave to the I2C master is not possible, external GPIO interrupts are used. The Protocol Interface has an inbuilt CAN peripheral to communicate over the CAN bus. The I2C master is supposed to configure the mailboxes of the interface for the particular CAN ID’s. These mailboxes are used to store the CAN messages received by the Protocol Interface over the CAN bus. Whenever a message is received by the CAN peripheral, it is stored in the respective mailbox. Once the number of Data Frames stored in any mailbox reached the limit (configured by I2C Master), an interrupt is given. The Protocol Interface uses SJOne development board for the communication that supports both I2C and CAN protocols. The write and read address of the Protocol Interface is 0x50 and 0x51 respectively, which are used by the I2C master for the communication.
The following shows the I2C bus protocol:
- Data transfer is initiated by master device only, when the bus is not busy.
- Data is clocked in; when the clock line (SCL) is HIGH, the state data line (SDA) determines value of the incoming bit. The START or STOP condition are given by changing state of SDA line when SCL line is high.
The states of the diagram are described in detail below:
- IDLE state: both data and clock lines remain HIGH.
- START condition: a HIGH to LOW transition of the SDA line when the SCL line is HIGH. All transactions must be preceded by a START condition.
- STOP condition: a LOW to HIGH transition of the SDA line while the SCL is HIGH. All transactions must be terminated by a STOP condition.
- Data transfer: the data transfer is preceded by a START condition. The state of data line during HIGH period of the SCL represents data bits. The state of data line is changed during the LOW period of the SCL. The data transfer is terminated with a STOP condition. The master device controls the data flow.
- Acknowledgement: After reception of each data byte, the receiver sends the acknowledgement bit. During master write mode, the ACK bit sent by slave signifies that it can accommodate more data. If the slave sends NACK then it cannot accommodate any more data. To acknowledge the slave has to pull down the SDA line during the acknowledge clock pulse during the HIGH period of SCL.
Controller Area Network (CAN) is a communication protocol which is developed by Bosch. It can be summarized as follows:
- The physical layer of the protocol uses twisted pair wire for transmission and reception of differential signal.
- A deterministic bus which uses non destructive bit wise arbitration.
- It uses small messages (around 8 bytes) protected by checksum for data integrity.
- Instead of explicit addressing, it uses 11 bit or 29 bit identifier which controls its priority on the bus.
- A sophisticated error handling mechanism, where error in message can be handled by retransmission of message.
- Effective mechanism to isolate faults and removing faulty nodes from the bus.
- Because of reliability, noise immunity it is extensively used in automotive industry for effective and efficient communication between different types of controllers.
- The speeds supported by CAN bus are 100K, 250K, 500K, 1MBits per second.
The microprocessor’s inbuilt CAN peripheral cannot directly communicate over the CAN bus. It needs a CAN transceiver to be connected between peripheral and bus. The main two task of CAN transceiver are:
- Receiving: It adapts signal levels from the bus, to levels that the CAN Controller expects. It generally comes with a protective circuitry that protects the processor’s internal CAN peripheral.
- Sending: It converts the transmit-bit signal received from the microcontroller’s internal CAN peripheral into a signal that needs to be sent onto the CAN bus.
- Supports 1Mbps speed of operation.
- Sutaible for 12V and 24V systems.
- Externally-controlled slope for reduced RFI systems.
- Power on reset and voltage brown out protection.
- Low current standby operation.
- Protection against short circuit protection in case of positive or negative battery voltage. It also has thermal shutdown protection, protection against high voltage transients.
The configuration registers and the memory map of the mailboxes can be seen from the diagram. Each mailbox has a dedicated configuration register that can be written by the I2C master. Each register contains the mailbox size and the requested CAN ID. The master can also mask some bits of the CAN ID to receive some range of CAN messages from the CAN bus. This concept is similar to the hardware filter. Instead of giving the range, mask bits are given. If the CAN ID is not masked, then the Mask bit (MSB) is 0, which states the mailbox is configured for a single CAN ID. The MASK field is considered only when the Mask bit is set to 1. Each configuration register is accessed by its addressed shown in the diagram.
The flowchart for configuring mailboxes is as shown in Figure4. The algorithm is as follows:
CAN to Mailbox
The flowchart for storing data received over CAN to mailbox is as shown in Figure5. The algorithm is as follows:
Read Status Register
The flowchart for reading Status Register of Protocol Interface is as shown in Figure6. The algorithm is as follows:
Read Mailbox Data
The flowchart for reading mailbox data is as shown in Figure7. The algorithm is as follows:
Send Data over CAN
The flowchart for sending data from I2C Master to CAN is as shown in Figure 8. The algorithm is as follows:
I2C Slave Device Implementation
The steps involved in implementation of this project are as follows:
- During boot-up process of Protocol Interface, I2C and CAN drivers are initialized.
- The device is ready to accept messages from I2C Master to be sent over the CAN bus. The data frame is as follows:
- The I2C Master write data to Configuration Registers of respective Mailbox. The data frame is as follows:
- According to the Configuration Registers, the mailboxes are configured for specific CAN_id, size and optional Mask_id.
- The device will continuously keep on accepting messages from CAN bus. For every message received, the software will check whether the received CAN_id matches with the configured mailbox CAN_id. If the id matches, then the Data Frame i.e. CAN_id and 8-bytes of Data is stored in the particular mailbox.
- For all the received messages, if a particular mailbox is configured with Mask_id, then it will also check the received CAN_id to match with the masked CAN_id.
- Once the message is saved in the mailbox, it will check whether the number of frames stored in a mailbox exceeds the configured size for that mailbox. If it exceeds, then device will give an external GPIO interrupt to I2C Master.
- On receiving an interrupt, I2C Master will initiate read transaction to read the Status Register. The data frame is as follows:
- Looking at the bits set in the Status Register, I2C Master will decide to read the data from any one mailbox at a time.
- I2C Master will initiate read transaction for one mailbox and device will send the data frames of requested mailbox. The data frame is as follows:
The software flow is discussed below:
- CAN controller of the PI2C244 accepts all the CAN messages
- Configure the interface for the specific message ID
- After configuration, the CAN messages with configured message ID are stored in the respective mailbox
- Once the data filled in mailbox reaches Low Watermark the interface will send a trigger to the I2C master device
- A master device has to read the read the status register to identify which mailbox is full
- A master device will send initiate a read command, the first byte sent by master device is considered as mailbox number. The interface will then send the data from the requested mailbox
- It can send CAN message frames at any time. To send a CAN frame, initiate a write command and write first byte as 0xFF, following the 11 bit CAN message ID and 8-byte data
Testing & Technical Challenges
Initial testing included testing of I2C and CAN protocols on the SJOne board. Dummy messages were used to test the communication. Since the software design includes use of semaphores for task synchronization and communication, several test cases were developed to test the design and the program flow. Every time I2C master sends a command, the I2C slave device is supposed to handle the request independently. Few of the commands have same register address, but repeated start conditions. By modifying and designing the I2C slave state diagram, it was achieved. Once the I2C slave was successfully able to differentiate all the commands, the actual sensor data was sent to test the communication. The debugging was done by forming different test benches for I2C slave device. All the CAN controllers were programmed to send 16 different types of CAN messages each with different CAN ID’s. The masking of the CAN ID’s was tested using these different CAN messages present on the CAN bus.
I2C Slave to I2C Master Communication
Once I2C Master configures the mailbox for a specific size, it will keep a track of the number of data frames present in a particular mailbox. But, once the number of frames exceeds the configured size, the Protocol Interface being an I2C Slave, cannot initiate a transaction and ask I2C Master to read the data. So, whenever the number of data frames for any mailbox exceeds the configured size, it will send an interrupt to I2C Master informing that at least one of the mailbox is exceeding the number of data frames. In response to this interrupt, I2C Master can initiate a read transaction and read the data from the mailbox.
Which Mailbox is FULL?
The size configured for each mailbox can be different. The device will send an interrupt whenever the number of messages in any mailbox exceeds the configured size. But, by getting an interrupt, I2C Master does not know that which mailbox is full. So it needs to initiate a read transaction for maximum number of data bytes. But, in doing that, the device (acting as an I2C Slave) can not send NACK to I2C Master saying that the data is over. So we introduced a concept of a Status Register. Status Register clearly defines that which mailbox is full. Adding this concept also gives an added feature of priority. When I2C Master reads the Status Register, it gets information about all the mailboxes that are full. So, depending on the priority, an I2C Master can decide on which mailbox's data to be read first.
Multiple Interrupts for Same Mailbox
We had faced a situation where the I2C slave device was giving multiple interrupts for the same mailbox. This issue was solved by restricting the interrupt send function by reading the status bit before sending an interrupt.
We have successfully implemented the initial version of protocol interface for I2C-CAN communication protocol. The communication is done using the Mailbox concepts. This interface supports configuration of mailboxes for different size (maximum 16 CAN frames) for specific CAN IDs. It also supports the range of CAN IDs using the Mask bits specified during the configuration. The interface allows the I2C master to read the status of all the mailboxes using Status Register. We have learned CAN communication protocol and I2C communication protocol in detail. We developed an I2C slave device by modifying the slave state diagram depending on the requirement of this project. This project can be extended to support 29-bit CAN IDs and also variable size CAN messages. It will definitely help designers to use with the controllers that does not support CAN interface. We have also provided a board support package that consists of the drivers required for the I2C master controller to use the interface.