S18: M.E.O.W
Contents
Grading Criteria
- How well is Software & Hardware Design described?
- How well can this report be used to reproduce this project?
- Code Quality
- Overall Report Quality:
- Software Block Diagrams
- Hardware Block Diagrams
- Schematic Quality
- Quality of technical challenges and solutions adopted.
Microcontroller Energy Observation Widget (M.E.O.W)
Abstract
This section should be a couple lines to describe what your project does.
Objectives & Introduction
Show list of your objectives. This section includes the high level details of your project. You can write about the various sensors or peripherals you used to get your project completed.
Team Members & Responsibilities
- R "Meow Meow" Nikfar
- Team Lead, PCB Design, Sensor Design and Implementation, Hardware Testing, Power Analysis, Sleep-Mode Firmware
- Ahsan "Whiskers" Uddin
- BeagleBone Testing, Video Capture Implementation, Storage, Sleep-Mode Research
- Nelson "fluffy" Wong
- Deep Power Modes, Power Analysis, Communications
- Britto "Kitty Kat" Thomas
- CAN BUS Low Power Research, Power Analysis
- Sai Kiran "Mittens" Rachamadugu
- Testing, Board Communications, User Interface
Schedule
Show a simple table or figures that show your scheduled as planned before you started working on the project. Then in another table column, write down the actual schedule so that readers can see the planned vs. actual goals. The point of the schedule is for readers to assess how to pace themselves if they are doing a similar project.
Week# | Date | Task | Status |
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1 | 03/04 |
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2 | 03/11 |
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3 | 03/18 |
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4 | 03/25 |
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5 | 04/01 |
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6 | 04/08 |
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7 | 04/15 |
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8 | 04/22 |
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9 | 04/29 |
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10 | 05/06 |
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11 | 05/13 |
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Parts List & Cost
Give a simple list of the cost of your project broken down by components. Do not write long stories here.
Design & Implementation
The design section can go over your hardware and software design. Organize this section using sub-sections that go over your design and implementation.
Hardware Design
Discuss your hardware design here. Show detailed schematics, and the interface here.
Low-Level Hardware
The low-level design starts from the PIR Motion Sensors and ends with the storage of the video data. The LPC1758 plays a big role in the communication of the overall system. The PIR sensors are each connected to the LPC1758 using a GPIO protocol and send signals if an object or and person is within their range. Once the signal is sent from the Sensors, the LPC wakes up and consumes power from the PCB which either uses the power from a plugged source or the backup LIPO battery. LPC then sends the right information to the BeagleBone board using UART protocol.
Power management functionality in LPC 176x CPU
- There are mainly 4 modes of runtime power savings mode that are available in LPC 176x CPU. They are described in details as follows
- Normal sleep
- Deep sleep
- Power Down mode
- Deep Power mode
- How to put to sleep
- WFE/WFI
- How to wake up system?
- Wake up interrupt controller (WIC)
- General interrupts
NXP LPC1700 Series Power Modes
Below is a tabulation of the features that are enabled or disabled for each power mode.
Features | Sleep | Deep-sleep | Power-down | Deep Power-down |
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Wake via reset | Yes | Yes | Yes | Yes |
Wake via RTC interrupt | Yes | Yes | Yes | Yes |
Wake via NMI | Yes | Yes | Yes | No |
Wake via EINT0-3 | Yes | Yes | Yes | No |
Wake via GPIO interrupts | Yes | Yes | Yes | No |
Wake via Eth WOL interrupt | Yes | Yes | Yes | No |
Wake via brownout detect | Yes | Yes | Yes | No |
Wake via watchdog timer | Yes | Yes | Yes | No |
Wake via USB-active interrupt | Yes | Yes | Yes | No |
Wake via CAN-active interrupt | Yes | Yes | Yes | No |
Wake via any other interrupt | Yes | No | No | No |
Main oscillator? | Enabled | Disabled | Disabled | Disabled |
IRC oscillator? | Enabled | Enabled | Disabled | Disabled |
RTC oscillator? | Enabled | Enabled | Enabled | Optional |
CPU clock? | Disabled | Disabled | Disabled | Disabled |
Peripheral clocks? | Enabled | Enabled | Disabled | Disabled |
USB clock? | Enabled | Disabled | Disabled | Disabled |
Watchdog clock? | Enabled | Enabled | Enabled* | Disabled |
PLLs? | Enabled | Disabled | Disabled | Disabled |
Status of Wake-up Interrupt Controller? | Active | Active | Active | Active |
Status of RTC backup registers? | Active | Active | Active | Active |
Status of on-chip regulator? | Active | Active | Active | Active or power-down with external circuitry |
Status of flash memory? | Standby | Standby | Powered-down | Powered-down |
Status of processor state? | Preserved | Preserved | Preserved | Powered-down |
Status of processor registers? | Preserved | Preserved | Preserved | Powered-down |
Status of peripheral registers? | Preserved | Preserved | Preserved | Powered-down |
Status of SRAM values? | Preserved | Preserved | Preserved | Powered-down |
Status of chip pin logic levels? | Preserved | Preserved | Preserved | Powered-down |
Access to flash memory? | Disabled | Disabled | Disabled | Disabled |
Access to main SRAM? | Disabled | Disabled | Disabled | Disabled |
Access to AHB SRAM? | Allowed with GPDMA support | Allowed with GPDMA support | Disabled | Disabled |
Access to peripherals? | Allowed with GPDMA support | Allowed with GPDMA support | Disabled | Disabled |
Dynamic power? | Disabled | Disabled | Disabled | Disabled |
Special instructions after wakeup? | No | Yes | Yes | Yes |
Resume from last PC? | Yes | Yes | Yes | No; system restarts |
Hardware Interface
In this section, you can describe how your hardware communicates, such as which BUSes used. You can discuss your driver implementation here, such that the Software Design section is isolated to talk about high level workings rather than inner working of your project.
Software Design
Show your software design. For example, if you are designing an MP3 Player, show the tasks that you are using, and what they are doing at a high level. Do not show the details of the code. For example, do not show exact code, but you may show psuedocode and fragments of code. Keep in mind that you are showing DESIGN of your software, not the inner workings of it.
Implementation
This section includes implementation, but again, not the details, just the high level. For example, you can list the steps it takes to communicate over a sensor, or the steps needed to write a page of memory onto SPI Flash. You can include sub-sections for each of your component implementation.
Testing & Technical Challenges
Describe the challenges of your project. What advise would you give yourself or someone else if your project can be started from scratch again? Make a smooth transition to testing section and described what it took to test your project.
Include sub-sections that list out a problem and solution, such as:
<Bug/issue name>
Discuss the issue and resolution.
Power Mode Entry and Exit
Entering
Power mode entry is based on tables 44 (Power Mode Control register) and 662 (SCR bit assignments) of UM10360 [1].
void enter_sleep() { LPC_SC->PCON = 0x0; // Table 44 SCB->SCR = 0x0; // Table 662 __WFI(); } void enter_deep_sleep() { LPC_SC->PCON = 0x8; // Table 44 SCB->SCR |= 0x4; // Table 662 __WFI(); } void enter_powerdown() { LPC_SC->PCON = 0x1; // Table 44 SCB->SCR |= 0x4; // Table 662 __WFI(); } void enter_deep_powerdown() { LPC_SC->PCON = 0x3; // Table 44 SCB->SCR |= 0x4; // Table 662 __WFI(); }
Note the use of of __WFI(), which the compiler resolves as the assembly directive
__ASM ("wfi");
Exiting
On exiting a power mode, the associated bit on the Power Mode Control register must be cleared. As noted in the datasheet, bits 8, 9, 10, and 11 are associated to the particular power modes, and these flags are cleared in software by writing "one" to the associated bit.
void clear_sleep() { LPC_SC->PCON |= 1 << 8; }; void clear_deep_sleep() { LPC_SC->PCON |= 1 << 9; }; void clear_powerdown() { LPC_SC->PCON |= 1 << 10; }; void clear_deep_powerdown() { LPC_SC->PCON |= 1 << 11; };
The PLLs (phase-locked loops) are turned off upon entering deep sleep, power-down, and deep power-down. Additionally, the IRC (the 4 MHz internal reference clock) and the clock dividers are reset when entering power-down and deep power-down. Therefore, the system clocks must be reconfigured/reinitialized when exiting any of these power modes.
We can take advantage of sys_clock_configure() from L0_LowLevel/sys_clock.cpp to perform this initialization.
One more thing to keep in mind regarding power mode exits: when exiting deep sleep, power-down, and deep power-down, there is a non-zero amount of time that must elapse before the system is able to resume processing. In all three cases, a timer starts counting the moment the power mode is exited, and code execution can resume after this timer expires.
- If the IRC was used prior to entering the power mode, then the 2-bit IRC timer is used, and it lasts is 22 = 4 cycles long.
- If the main external oscillator was used, then the 12-bit main oscillator timer is used, and it lasts 212 = 4096 cycles long.
Moreover, in power-down and deep power-down, the flash undergoes wake-up, and its wake-up timer must expire (approximately 100 µs) before it can be used. This means that no instructions can be fetched from flash for execution until this timer expires.
Conclusion
Conclude your project here. You can recap your testing and problems. You should address the "so what" part here to indicate what you ultimately learnt from this project. How has this project increased your knowledge?
Project Video
Upload a video of your project and post the link here.
Project Source Code
References
Acknowledgement
Any acknowledgement that you may wish to provide can be included here.
References Used
List any references used in project.
[1] NXP Semiconductors. (19 Dec. 2016). UM10360: LPC176x/5x user manual.
[2] NXP Semiconductors. (25 Feb. 2010). AN10915: Using the LPC1700 power modes.
Appendix
You can list the references you used.